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authorOtavio Salvador <otavio@ossystems.com.br>2013-12-16 20:44:05 -0200
committerStefano Babic <sbabic@denx.de>2014-01-03 15:44:05 +0100
commitc655b816e55464bf615e875475b8ffa506a4455e (patch)
tree3ad38086a1cf5aa0b8fa2acb6f4f8e828f624f5f /arch
parent6584a1b52624d60249c3d5115b176315dbac3939 (diff)
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ARM: mx6: Allow enablement of FEC Anatop based clock for all MX6
The enable_fec_anatop_clock method should be available for all MX6 variant as it is not MX6 SoloLite specific. This moves the code out of the #ifdef/#endif and we make it conditional to CONFIG_FEC_MXC instead. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 20c7e70..fcc4f35 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -310,7 +310,18 @@ static u32 get_mmdc_ch0_clk(void)
return freq / (podf + 1);
}
+#else
+static u32 get_mmdc_ch0_clk(void)
+{
+ u32 cbcdr = __raw_readl(&imx_ccm->cbcdr);
+ u32 mmdc_ch0_podf = (cbcdr & MXC_CCM_CBCDR_MMDC_CH0_PODF_MASK) >>
+ MXC_CCM_CBCDR_MMDC_CH0_PODF_OFFSET;
+
+ return get_periph_clk() / (mmdc_ch0_podf + 1);
+}
+#endif
+#ifdef CONFIG_FEC_MXC
int enable_fec_anatop_clock(void)
{
u32 reg = 0;
@@ -339,16 +350,6 @@ int enable_fec_anatop_clock(void)
return 0;
}
-
-#else
-static u32 get_mmdc_ch0_clk(void)
-{
- u32 cbcdr = __raw_readl(&imx_ccm->cbcdr);
- u32 mmdc_ch0_podf = (cbcdr & MXC_CCM_CBCDR_MMDC_CH0_PODF_MASK) >>
- MXC_CCM_CBCDR_MMDC_CH0_PODF_OFFSET;
-
- return get_periph_clk() / (mmdc_ch0_podf + 1);
-}
#endif
static u32 get_usdhc_clk(u32 port)