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author | chenhui zhao <chenhui.zhao@freescale.com> | 2011-10-03 08:38:50 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-11-08 08:30:32 -0600 |
commit | aada81de703e0fb26ae1a8dc8fc8d6a7a37fa3c9 (patch) | |
tree | 9f04ac09cf17d08f73bbef5de73240c2d1bf397a /arch | |
parent | afc52db2f76e0215411a916af46c578fcfd02a81 (diff) | |
download | u-boot-imx-aada81de703e0fb26ae1a8dc8fc8d6a7a37fa3c9.zip u-boot-imx-aada81de703e0fb26ae1a8dc8fc8d6a7a37fa3c9.tar.gz u-boot-imx-aada81de703e0fb26ae1a8dc8fc8d6a7a37fa3c9.tar.bz2 |
powerpc/mpc8548: Add workaround for erratum NMG_eTSEC129
Erratum NMG_eTSEC129 (eTSEC86 in MPC8548 document) applies to some early
verion silicons. This workaround detects if the eTSEC Rx logic is properly
initialized, and reinitialize the eTSEC Rx logic.
Signed-off-by: Gong Chen <g.chen@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index a09eb91..253bf08 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -103,6 +103,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 puts("Work-around for Erratum NMG_LBC103 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 + if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0)) + puts("Work-around for Erratum NMG ETSEC129 enabled\n"); +#endif return 0; } diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index c3d6ba9..981d639 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -64,6 +64,7 @@ #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120 #define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 +#define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 #elif defined(CONFIG_MPC8555) #define CONFIG_MAX_CPUS 1 |