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authorAllen Martin <amartin@nvidia.com>2013-01-29 13:51:27 +0000
committerTom Warren <twarren@nvidia.com>2013-02-11 10:35:24 -0700
commit91673e2adf8686aa0bb0cb184a4e000b77851f0f (patch)
treeea87abdd6d73a01d49be8c95b8703d3a5ca0b935 /arch
parent23e3158f3450c569f569573cc9462c27c7d8da9e (diff)
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tegra: add addresses of SPI SLINK controllers
Add I/O addresses of SPI SLINK controllers 1-6 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-tegra/tegra.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h
index 013a3c5..5273fa1 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -40,6 +40,12 @@
#define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400)
#define NV_PA_NAND_BASE (NV_PA_APB_MISC_BASE + 0x8000)
#define NV_PA_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380)
+#define NV_PA_SLINK1_BASE (NV_PA_APB_MISC_BASE + 0xD400)
+#define NV_PA_SLINK2_BASE (NV_PA_APB_MISC_BASE + 0xD600)
+#define NV_PA_SLINK3_BASE (NV_PA_APB_MISC_BASE + 0xD800)
+#define NV_PA_SLINK4_BASE (NV_PA_APB_MISC_BASE + 0xDA00)
+#define NV_PA_SLINK5_BASE (NV_PA_APB_MISC_BASE + 0xDC00)
+#define NV_PA_SLINK6_BASE (NV_PA_APB_MISC_BASE + 0xDE00)
#define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000)
#define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400)
#define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400)