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| author | Simon Glass <sjg@chromium.org> | 2015-04-20 07:07:03 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-04-29 18:51:50 -0600 |
| commit | 87f4cd3a308b0bcffd8f9b5e7121fdb086c080f5 (patch) | |
| tree | cfa42304673c7c7d0e840b1c20e8ff2ed6c0878b /arch | |
| parent | 8712af97e793ae30515876480fc54275b79cc56a (diff) | |
| download | u-boot-imx-87f4cd3a308b0bcffd8f9b5e7121fdb086c080f5.zip u-boot-imx-87f4cd3a308b0bcffd8f9b5e7121fdb086c080f5.tar.gz u-boot-imx-87f4cd3a308b0bcffd8f9b5e7121fdb086c080f5.tar.bz2 | |
x86: link: Add PCH driver to support SPI Flash
U-Boot on coreboot does not have a driver for the PCH so cannot see the
SPI peripheral now that it has moved inside the PCH. Add a simple driver so
that SPI flash works again.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/cpu/coreboot/pci.c | 11 | ||||
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 2 |
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c index fa415dd..67eb14c 100644 --- a/arch/x86/cpu/coreboot/pci.c +++ b/arch/x86/cpu/coreboot/pci.c @@ -34,3 +34,14 @@ U_BOOT_DRIVER(pci_x86_drv) = { .of_match = pci_x86_ids, .ops = &pci_x86_ops, }; + +static const struct udevice_id generic_pch_ids[] = { + { .compatible = "intel,pch" }, + { } +}; + +U_BOOT_DRIVER(generic_pch_drv) = { + .name = "pch", + .id = UCLASS_PCH, + .of_match = generic_pch_ids, +}; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index b450c3c..7c7034c 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -181,7 +181,7 @@ pch { reg = <0x0000f800 0 0 0 0>; - compatible = "intel,bd82x6x"; + compatible = "intel,bd82x6x", "intel,pch"; u-boot,dm-pre-reloc; #address-cells = <1>; #size-cells = <1>; |