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authorChen-Yu Tsai <wens@csie.org>2014-10-04 20:37:28 +0800
committerHans de Goede <hdegoede@redhat.com>2014-10-24 09:35:38 +0200
commit78c396a1130a118d48068eb5615a912506050832 (patch)
tree22810381c2c1adac4011628e947a91664564c6c9 /arch
parent4cdefba86d08688e96f273ee7bf9d52052362477 (diff)
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ARM: sunxi: Fix reset command on sun6i/sun8i
The watchdog on sun6i/sun8i has a different layout. Add the new layout and fix up the setup functions so that reset works. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> [ ijc -- removed sun5i workaround from sun6i/sun8i codepath as discussed ]
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/cpu/armv7/sunxi/board.c10
-rw-r--r--arch/arm/include/asm/arch-sunxi/watchdog.h20
2 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index b6d63db..436df8c 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -75,6 +75,7 @@ int gpio_init(void)
void reset_cpu(ulong addr)
{
+#if defined(CONFIG_SUN4I) || defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I)
static const struct sunxi_wdog *wdog =
&((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
@@ -86,6 +87,15 @@ void reset_cpu(ulong addr)
/* sun5i sometimes gets stuck without this */
writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
}
+#else /* CONFIG_SUN6I || CONFIG_SUN8I || .. */
+ static const struct sunxi_wdog *wdog =
+ ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
+
+ /* Set the watchdog for its shortest interval (.5s) and wait */
+ writel(WDT_CFG_RESET, &wdog->cfg);
+ writel(WDT_MODE_EN, &wdog->mode);
+ writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl);
+#endif
}
/* do some early init */
diff --git a/arch/arm/include/asm/arch-sunxi/watchdog.h b/arch/arm/include/asm/arch-sunxi/watchdog.h
index 5b755e3..ccc8fa3 100644
--- a/arch/arm/include/asm/arch-sunxi/watchdog.h
+++ b/arch/arm/include/asm/arch-sunxi/watchdog.h
@@ -12,6 +12,9 @@
#define WDT_CTRL_RESTART (0x1 << 0)
#define WDT_CTRL_KEY (0x0a57 << 1)
+
+#if defined(CONFIG_SUN4I) || defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I)
+
#define WDT_MODE_EN (0x1 << 0)
#define WDT_MODE_RESET_EN (0x1 << 1)
@@ -21,4 +24,21 @@ struct sunxi_wdog {
u32 res[2];
};
+#else
+
+#define WDT_CFG_RESET (0x1)
+#define WDT_MODE_EN (0x1)
+
+struct sunxi_wdog {
+ u32 irq_en; /* 0x00 */
+ u32 irq_sta; /* 0x04 */
+ u32 res1[2];
+ u32 ctl; /* 0x10 */
+ u32 cfg; /* 0x14 */
+ u32 mode; /* 0x18 */
+ u32 res2;
+};
+
+#endif
+
#endif /* _SUNXI_WATCHDOG_H_ */