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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-10-08 13:25:23 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-10-10 10:03:23 +0900
commit6c22742d3defa76be00b4d3b5b49911fa63ffa0a (patch)
tree9ad1b933880ba6a5da307906a408fe0e25ef03a8 /arch
parentdacdb2402742a0365ca543798a349182872131b4 (diff)
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ARM: uniphier: enable SSC for DPLL (DRAM PLL) on LD11 SoC
For Electro-Magnetic Compatibility test. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-uniphier/clk/pll-ld11.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/clk/pll-ld11.c b/arch/arm/mach-uniphier/clk/pll-ld11.c
index 8a4a748..7746deb 100644
--- a/arch/arm/mach-uniphier/clk/pll-ld11.c
+++ b/arch/arm/mach-uniphier/clk/pll-ld11.c
@@ -23,6 +23,7 @@ void uniphier_ld11_pll_init(void)
uniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL);
uniphier_ld20_sscpll_ssc_en(SC_MPLLCTRL);
uniphier_ld20_sscpll_ssc_en(SC_VSPLLCTRL);
+ uniphier_ld20_sscpll_ssc_en(SC_DPLLCTRL);
uniphier_ld20_vpll27_init(SC_VPLL27FCTRL);
uniphier_ld20_vpll27_init(SC_VPLL27ACTRL);