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| author | Wills Wang <wills.wang@live.com> | 2016-05-22 11:59:50 +0800 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-05-26 01:34:14 +0200 |
| commit | 42a3f3e6ebbac4d93892d2b870502743d7308988 (patch) | |
| tree | 8281d7f9e766b1608d962cfec02e84da8f0ca0de /arch | |
| parent | 1ad3a6fb5b9eb8444281c3975de6c6b7e1549c53 (diff) | |
| download | u-boot-imx-42a3f3e6ebbac4d93892d2b870502743d7308988.zip u-boot-imx-42a3f3e6ebbac4d93892d2b870502743d7308988.tar.gz u-boot-imx-42a3f3e6ebbac4d93892d2b870502743d7308988.tar.bz2 | |
mips: ath79: ar933x: Fix ethernet PHY mismatch
We need reset the Ethernet Switch analog part before operation,
or the build-in Ethernet PHY don't work.
Signed-off-by: Wills Wang <wills.wang@live.com>
Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 | ||||
| -rw-r--r-- | arch/mips/mach-ath79/reset.c | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h index a8e51cb..dabcad0 100644 --- a/arch/mips/mach-ath79/include/mach/ar71xx_regs.h +++ b/arch/mips/mach-ath79/include/mach/ar71xx_regs.h @@ -660,6 +660,7 @@ #define AR933X_RESET_GE1_MDIO BIT(23) #define AR933X_RESET_GE0_MDIO BIT(22) +#define AR933X_RESET_ETH_SWITCH_ANALOG BIT(14) #define AR933X_RESET_GE1_MAC BIT(13) #define AR933X_RESET_WMAC BIT(11) #define AR933X_RESET_GE0_MAC BIT(9) diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c index 188eccb..a88bcbc 100644 --- a/arch/mips/mach-ath79/reset.c +++ b/arch/mips/mach-ath79/reset.c @@ -81,7 +81,8 @@ static int eth_init_ar933x(void) MAP_NOCACHE); const u32 mask = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO | AR933X_RESET_GE1_MAC | AR933X_RESET_GE1_MDIO | - AR933X_RESET_ETH_SWITCH; + AR933X_RESET_ETH_SWITCH | + AR933X_RESET_ETH_SWITCH_ANALOG; /* Clear MDIO slave EN bit. */ clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17)); |