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authorRon Madrid <ron_madrid@sbcglobal.net>2010-04-28 16:04:43 -0700
committerKim Phillips <kim.phillips@freescale.com>2010-05-07 12:19:52 -0500
commit3b439792b0781921c599d8af9bed6a771d295b53 (patch)
tree88e2946fbd7771404999751da2fbfcaec38af99e /arch
parent767fdc4af684770f5e97a6c5e19a8ac2616b8329 (diff)
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mpc83xx: Add UPMA configuration to SIMPC8313
Added UPM array table, upmconfig, and Local Bus configuration support for SIMPC8313 Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index dfe8f79..03ae6a7 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -245,6 +245,7 @@
#define MxMR_DSx_4_CYCL 0x00c00000 /* 4 cycle Disable Period */
#define MxMR_DSx_MSK 0x00c00000 /* Disable Timer Period Mask */
#define MxMR_AMx_MSK 0x07000000 /* Addess Multiplex Size Mask */
+#define MxMR_UWPL 0x08000000 /* LUPWAIT Polarity Mask */
#define MxMR_OP_NORM 0x00000000 /* Normal Operation */
#define MxMR_OP_WARR 0x10000000 /* Write to Array */
#define MxMR_OP_RARR 0x20000000 /* Read from Array */