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author | Xiubo Li <Li.Xiubo@freescale.com> | 2014-11-21 17:40:57 +0800 |
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committer | York Sun <yorksun@freescale.com> | 2014-12-11 09:42:03 -0800 |
commit | 1a2826f6e02d0d3ec97b77b5b13c13d2ac27fb9d (patch) | |
tree | a5e7684cd9e48f53ee736bb06da7a3a169fc9057 /arch | |
parent | 290e6e921f255fdee072d21539bbad16b9a3e714 (diff) | |
download | u-boot-imx-1a2826f6e02d0d3ec97b77b5b13c13d2ac27fb9d.zip u-boot-imx-1a2826f6e02d0d3ec97b77b5b13c13d2ac27fb9d.tar.gz u-boot-imx-1a2826f6e02d0d3ec97b77b5b13c13d2ac27fb9d.tar.bz2 |
ls102xa: changing a few targets' configurations.
Enable hypervisors utilizing the ARMv7 virtualization extension
on the LS1021A-QDS/TWR boards with the A7 core tile, we add the
required configuration variable.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/include/asm/arch-ls102xa/config.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index ef775cf..0533a83 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -11,6 +11,8 @@ #define OCRAM_BASE_ADDR 0x10000000 #define OCRAM_SIZE 0x00020000 +#define OCRAM_BASE_S_ADDR 0x10010000 +#define OCRAM_S_SIZE 0x00010000 #define CONFIG_SYS_IMMR 0x01000000 #define CONFIG_SYS_DCSRBAR 0x20000000 diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 5abc3a1..697d4ca 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -17,6 +17,9 @@ #define SOC_VER_LS1021 0x11 #define SOC_VER_LS1022 0x12 +#define CCSR_BRR_OFFSET 0xe4 +#define CCSR_SCRATCHRW1_OFFSET 0x200 + #define RCWSR0_SYS_PLL_RAT_SHIFT 25 #define RCWSR0_SYS_PLL_RAT_MASK 0x1f #define RCWSR0_MEM_PLL_RAT_SHIFT 16 |