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| author | Chris Zankel <chris@zankel.net> | 2016-08-10 18:36:44 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-08-15 18:46:38 -0400 |
| commit | c978b52410016b0ab5a213f235596340af8d45f7 (patch) | |
| tree | b01e9a8ea9a92fe962a545974339677b87dcc1ba /arch/xtensa/dts | |
| parent | de5e5cea022ab44006ff1edf45a39f0943fb9dff (diff) | |
| download | u-boot-imx-c978b52410016b0ab5a213f235596340af8d45f7.zip u-boot-imx-c978b52410016b0ab5a213f235596340af8d45f7.tar.gz u-boot-imx-c978b52410016b0ab5a213f235596340af8d45f7.tar.bz2 | |
xtensa: add support for the xtensa processor architecture [2/2]
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/xtensa/dts')
| -rw-r--r-- | arch/xtensa/dts/Makefile | 13 | ||||
| l--------- | arch/xtensa/dts/include/dt-bindings | 1 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/xtensa/dts/Makefile b/arch/xtensa/dts/Makefile new file mode 100644 index 0000000..eacf6f3 --- /dev/null +++ b/arch/xtensa/dts/Makefile @@ -0,0 +1,13 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +targets += $(dtb-y) + +DTC_FLAGS += + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb diff --git a/arch/xtensa/dts/include/dt-bindings b/arch/xtensa/dts/include/dt-bindings new file mode 120000 index 0000000..0cecb3d --- /dev/null +++ b/arch/xtensa/dts/include/dt-bindings @@ -0,0 +1 @@ +../../../../include/dt-bindings
\ No newline at end of file |