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author | Chris Zankel <chris@zankel.net> | 2016-08-10 18:36:48 +0300 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-08-15 18:46:40 -0400 |
commit | 7e270ec3af02d2358f9a454ba0d0bb39f07d14b6 (patch) | |
tree | 6d60ccd942f2dccb9017550e988a446de7351781 /arch/xtensa/dts/xtfpga-flash-128m.dtsi | |
parent | 28b48a0710cde7270bca423cee8ed12b0c54eb01 (diff) | |
download | u-boot-imx-7e270ec3af02d2358f9a454ba0d0bb39f07d14b6.zip u-boot-imx-7e270ec3af02d2358f9a454ba0d0bb39f07d14b6.tar.gz u-boot-imx-7e270ec3af02d2358f9a454ba0d0bb39f07d14b6.tar.bz2 |
xtensa: add support for the 'xtfpga' evaluation board
The 'xtfpga' board is actually a set of FPGA evaluation boards that
can be configured to run an Xtensa processor.
- Avnet Xilinx LX60
- Avnet Xilinx LX110
- Avnet Xilinx LX200
- Xilinx ML605
- Xilinx KC705
These boards share the same components (open-ethernet, ns16550 serial,
lcd display, flash, etc.).
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/xtensa/dts/xtfpga-flash-128m.dtsi')
-rw-r--r-- | arch/xtensa/dts/xtfpga-flash-128m.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/xtensa/dts/xtfpga-flash-128m.dtsi b/arch/xtensa/dts/xtfpga-flash-128m.dtsi new file mode 100644 index 0000000..d3a88e0 --- /dev/null +++ b/arch/xtensa/dts/xtfpga-flash-128m.dtsi @@ -0,0 +1,28 @@ +/ { + soc { + flash: flash@00000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x00000000 0x08000000>; + bank-width = <2>; + device-width = <2>; + partition@0x0 { + label = "data"; + reg = <0x00000000 0x06000000>; + }; + partition@0x6000000 { + label = "boot loader area"; + reg = <0x06000000 0x00800000>; + }; + partition@0x6800000 { + label = "kernel image"; + reg = <0x06800000 0x017e0000>; + }; + partition@0x7fe0000 { + label = "boot environment"; + reg = <0x07fe0000 0x00020000>; + }; + }; + }; +}; |