diff options
author | York Sun <yorksun@freescale.com> | 2012-10-08 07:44:25 +0000 |
---|---|---|
committer | Andy Fleming <afleming@freescale.com> | 2012-10-22 14:31:28 -0500 |
commit | eb5394120643922626f18e5fe7b0b3dc0ed43b9a (patch) | |
tree | 968121a3577cf3c8e14bd435d9c8c303140f3cd1 /arch/x86 | |
parent | f31cfd19253713eea59311dec9e99df5d43b2db9 (diff) | |
download | u-boot-imx-eb5394120643922626f18e5fe7b0b3dc0ed43b9a.zip u-boot-imx-eb5394120643922626f18e5fe7b0b3dc0ed43b9a.tar.gz u-boot-imx-eb5394120643922626f18e5fe7b0b3dc0ed43b9a.tar.bz2 |
powerpc/mpc85xx: software workaround for DDR erratum A-004468
Boot space translation utilizes the pre-translation address to select
the DDR controller target. However, the post-translation address will be
presented to the selected DDR controller. It is possible that the pre-
translation address selects one DDR controller but the post-translation
address exists in a different DDR controller when using certain DDR
controller interleaving modes. The device may fail to boot under these
circumstances. Note that a DDR MSE error will not be detected since DDR
controller bounds registers are programmed to be the same when configured
for DDR controller interleaving.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/x86')
0 files changed, 0 insertions, 0 deletions