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| author | Simon Glass <sjg@chromium.org> | 2016-03-06 19:28:10 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 10:27:23 +0800 |
| commit | e9822d44a52891593f14898045b4dad34bfc71f0 (patch) | |
| tree | 38a68b2093aafa4a91817f71491d83f2cfc63492 /arch/x86 | |
| parent | 8bf08b4207b8483a9a238b722ab0f92c7c880333 (diff) | |
| download | u-boot-imx-e9822d44a52891593f14898045b4dad34bfc71f0.zip u-boot-imx-e9822d44a52891593f14898045b4dad34bfc71f0.tar.gz u-boot-imx-e9822d44a52891593f14898045b4dad34bfc71f0.tar.bz2 | |
x86: link: Add required GPIO properties
In order to use GPIO phandles we need to add some GPIO properties as
specified by the GPIO bindings. Add these for link.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index f85e55c..e203139 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -249,23 +249,29 @@ }; }; - gpioa { + gpio_a: gpioa { compatible = "intel,ich6-gpio"; u-boot,dm-pre-reloc; + #gpio-cells = <2>; + gpio-controller; reg = <0 0x10>; bank-name = "A"; }; - gpiob { + gpio_b: gpiob { compatible = "intel,ich6-gpio"; u-boot,dm-pre-reloc; + #gpio-cells = <2>; + gpio-controller; reg = <0x30 0x10>; bank-name = "B"; }; - gpioc { + gpio_c: gpioc { compatible = "intel,ich6-gpio"; u-boot,dm-pre-reloc; + #gpio-cells = <2>; + gpio-controller; reg = <0x40 0x10>; bank-name = "C"; }; |