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authorBin Meng <bmeng.cn@gmail.com>2015-04-13 19:03:42 +0800
committerSimon Glass <sjg@chromium.org>2015-04-29 18:51:48 -0600
commit9704f23b0080f417b73cd430c0f806752785f30b (patch)
tree4f61b4e93c16c32651459dd81c86adf8fe3af6c3 /arch/x86
parent5098d73e86d23d9b76eafcaa6c5bce9e2ef6f6c4 (diff)
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x86: queensbay: Avoid using PCH prefix
The prefix PCH was taken from ivybridge port. However Queensbay platform official document does not mention PCH. It is composed of TunnelCreek processor and Topcliff IOH chipset. For accuracy, avoid using PCH prefix in the macro. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/cpu/queensbay/tnc.c4
-rw-r--r--arch/x86/include/asm/arch-queensbay/tnc.h3
2 files changed, 3 insertions, 4 deletions
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index b7236e7..f756a0d 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -16,9 +16,9 @@ static void unprotect_spi_flash(void)
{
u32 bc;
- bc = x86_pci_read_config32(PCH_LPC_DEV, 0xd8);
+ bc = x86_pci_read_config32(TNC_LPC, 0xd8);
bc |= 0x1; /* unprotect the flash */
- x86_pci_write_config32(PCH_LPC_DEV, 0xd8, bc);
+ x86_pci_write_config32(TNC_LPC, 0xd8, bc);
}
int arch_cpu_init(void)
diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h b/arch/x86/include/asm/arch-queensbay/tnc.h
index 67c5e05..10ea51d 100644
--- a/arch/x86/include/asm/arch-queensbay/tnc.h
+++ b/arch/x86/include/asm/arch-queensbay/tnc.h
@@ -9,7 +9,6 @@
#include <pci.h>
-/* PCI Configuration Space (D31:F0): LPC */
-#define PCH_LPC_DEV PCI_BDF(0, 0x1f, 0)
+#define TNC_LPC PCI_BDF(0, 31, 0)
#endif /* _X86_ARCH_TNC_H_ */