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authorBin Meng <bmeng.cn@gmail.com>2016-05-11 07:44:59 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-05-23 15:18:00 +0800
commit789b6dceccbb852b0be235334b713467f88e2f8e (patch)
tree2a8f7906144a677809b2613b5093c98d68e59f49 /arch/x86/lib/coreboot_table.c
parent548344912f791ff7f7f932afdaf669f45a20448b (diff)
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x86: Prepare configuration tables in dedicated high memory region
Currently when CONFIG_SEABIOS is on, U-Boot allocates configuration tables via normal malloc(). To simplify, use a dedicated memory region which is reserved on the stack before relocation for this purpose. Add functions for reserve and malloc. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/lib/coreboot_table.c')
-rw-r--r--arch/x86/lib/coreboot_table.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
index cb45a79..ceab3cf 100644
--- a/arch/x86/lib/coreboot_table.c
+++ b/arch/x86/lib/coreboot_table.c
@@ -9,6 +9,37 @@
#include <asm/coreboot_tables.h>
#include <asm/e820.h>
+DECLARE_GLOBAL_DATA_PTR;
+
+int high_table_reserve(void)
+{
+ /* adjust stack pointer to reserve space for configuration tables */
+ gd->arch.high_table_limit = gd->start_addr_sp;
+ gd->start_addr_sp -= CONFIG_HIGH_TABLE_SIZE;
+ gd->arch.high_table_ptr = gd->start_addr_sp;
+
+ /* clear the memory */
+ memset((void *)gd->arch.high_table_ptr, 0, CONFIG_HIGH_TABLE_SIZE);
+
+ gd->start_addr_sp &= ~0xf;
+
+ return 0;
+}
+
+void *high_table_malloc(size_t bytes)
+{
+ u32 new_ptr;
+ void *ptr;
+
+ new_ptr = gd->arch.high_table_ptr + bytes;
+ if (new_ptr >= gd->arch.high_table_limit)
+ return NULL;
+ ptr = (void *)gd->arch.high_table_ptr;
+ gd->arch.high_table_ptr = new_ptr;
+
+ return ptr;
+}
+
/**
* cb_table_init() - initialize a coreboot table header
*