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| author | Bin Meng <bmeng.cn@gmail.com> | 2016-06-17 02:13:17 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-07-12 13:46:01 +0800 |
| commit | 3ff11aaa507aa222e76aa2517efc9786494994ed (patch) | |
| tree | 1ef2558d0698e6a38bdbce324fdbdc72be7ec969 /arch/x86/include | |
| parent | 79c2c257cf66da5ac90b5c53954310361e41bb0a (diff) | |
| download | u-boot-imx-3ff11aaa507aa222e76aa2517efc9786494994ed.zip u-boot-imx-3ff11aaa507aa222e76aa2517efc9786494994ed.tar.gz u-boot-imx-3ff11aaa507aa222e76aa2517efc9786494994ed.tar.bz2 | |
x86: baytrail: acpi: Hide internal UART per GNVS setting
If global NVS says internal UART is not enabled, hide it in the ASL
code so that OS won't see it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/asm/arch-baytrail/acpi/lpc.asl | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl b/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl index 22f0d68..fe34d32 100644 --- a/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl +++ b/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl @@ -119,17 +119,14 @@ Device (LPCB) Method(_STA, 0, Serialized) { - /* - * TODO: - * - * Need to hide the internal UART depending on whether - * internal UART is enabled or not so that external - * SuperIO UART can be exposed to system. - */ - Store(1, UI3E) - Store(1, UI4E) - Store(1, C1EN) - Return (STA_VISIBLE) + If (LEqual(IURE, 1)) { + Store(1, UI3E) + Store(1, UI4E) + Store(1, C1EN) + Return (STA_VISIBLE) + } Else { + Return (STA_MISSING) + } } |