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| author | Bin Meng <bmeng.cn@gmail.com> | 2016-05-07 07:46:14 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-05-23 15:18:00 +0800 |
| commit | d4e61f505b8fd8662142b6e27ef443f88f73176e (patch) | |
| tree | e5c397e785e36bf031e20aa6e1cdf967bacd00d0 /arch/x86/include/asm | |
| parent | 07ac84eaaa5daeae4a56ff70649a3e50fc470db5 (diff) | |
| download | u-boot-imx-d4e61f505b8fd8662142b6e27ef443f88f73176e.zip u-boot-imx-d4e61f505b8fd8662142b6e27ef443f88f73176e.tar.gz u-boot-imx-d4e61f505b8fd8662142b6e27ef443f88f73176e.tar.bz2 | |
x86: irq: Enable SCI on IRQ9
By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to use IRQ9.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/x86/include/asm')
| -rw-r--r-- | arch/x86/include/asm/irq.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h index 5b9e673..ddb529e 100644 --- a/arch/x86/include/asm/irq.h +++ b/arch/x86/include/asm/irq.h @@ -34,6 +34,8 @@ enum pirq_config { * IRQ N is available to be routed * @lb_bdf: irq router's PCI bus/device/function number encoding * @ibase: IBASE register block base address + * @actl_8bit: ACTL register width is 8-bit (for ICH series chipset) + * @actl_addr: ACTL register offset */ struct irq_router { int config; @@ -41,6 +43,8 @@ struct irq_router { u16 irq_mask; u32 bdf; u32 ibase; + bool actl_8bit; + int actl_addr; }; struct pirq_routing { |