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authorBin Meng <bmeng.cn@gmail.com>2015-02-02 22:35:23 +0800
committerSimon Glass <sjg@chromium.org>2015-02-06 12:07:40 -0700
commitb994efbd2d515ee0ec50c03191ffb348b197d4f3 (patch)
treeba0b3b5eec71938b041ab0007f1fc587068b7966 /arch/x86/include/asm/arch-quark/quark.h
parent7df546a653462c91bc88bf9bf465ff2e39fde59e (diff)
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x86: Add header files for Intel Quark SoC defines
device.h for integrated pci devices' bdf on Quark SoC and quark.h for various memory-mapped and i/o-mapped base addresses within SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/arch-quark/quark.h')
-rw-r--r--arch/x86/include/asm/arch-quark/quark.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/x86/include/asm/arch-quark/quark.h b/arch/x86/include/asm/arch-quark/quark.h
new file mode 100644
index 0000000..ebbcf77
--- /dev/null
+++ b/arch/x86/include/asm/arch-quark/quark.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _QUARK_H_
+#define _QUARK_H_
+
+/* Message Bus Ports */
+#define MSG_PORT_MEM_ARBITER 0x00
+#define MSG_PORT_HOST_BRIDGE 0x03
+#define MSG_PORT_RMU 0x04
+#define MSG_PORT_MEM_MGR 0x05
+#define MSG_PORT_SOC_UNIT 0x31
+
+/* Host Memory I/O Boundary */
+#define HM_BOUND 0x08
+
+/* eSRAM Block Page Control */
+#define ESRAM_BLK_CTRL 0x82
+#define ESRAM_BLOCK_MODE 0x10000000
+
+/* DRAM */
+#define DRAM_BASE 0x00000000
+#define DRAM_MAX_SIZE 0x80000000
+
+/* eSRAM */
+#define ESRAM_SIZE 0x80000
+
+/* Memory BAR Enable */
+#define MEM_BAR_EN 0x00000001
+
+/* I/O BAR Enable */
+#define IO_BAR_EN 0x80000000
+
+/* 64KiB of RMU binary in flash */
+#define RMU_BINARY_SIZE 0x10000
+
+#endif /* _QUARK_H_ */