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authorBin Meng <bmeng.cn@gmail.com>2016-02-01 01:40:40 -0800
committerBin Meng <bmeng.cn@gmail.com>2016-02-05 12:47:20 +0800
commit254e6779258f9f3aa8ba67fb4506fd570fae9687 (patch)
treed11492d794954fc601b5354432ede74d10afad9b /arch/x86/cpu
parentefd633ccdd06361f63f9b8918eee647ceb65283d (diff)
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x86: quark: Drop unprotect_spi_flash()
Unprotecting SPI flash is now handled in the SPI controller driver, via a call to the PCH driver. Drop the ad-hoc version. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r--arch/x86/cpu/quark/quark.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 6e20930..afb3463 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -20,21 +20,6 @@ static struct pci_device_id mmc_supported[] = {
{},
};
-/*
- * TODO:
- *
- * This whole routine should be removed until we fully convert the ICH SPI
- * driver to DM and make use of DT to pass the bios control register offset
- */
-static void unprotect_spi_flash(void)
-{
- u32 bc;
-
- qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, 0xd8, &bc);
- bc |= 0x1; /* unprotect the flash */
- qrk_pci_write_config_dword(QUARK_LEGACY_BRIDGE, 0xd8, bc);
-}
-
static void quark_setup_mtrr(void)
{
u32 base, mask;
@@ -259,8 +244,6 @@ int arch_cpu_init(void)
/* Turn on legacy segments (A/B/E/F) decode to system RAM */
quark_enable_legacy_seg();
- unprotect_spi_flash();
-
return 0;
}