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author | Minkyu Kang <mk7.kang@samsung.com> | 2012-12-10 13:44:41 +0900 |
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committer | Minkyu Kang <mk7.kang@samsung.com> | 2012-12-10 14:13:27 +0900 |
commit | 2c601c7208713ba9b2158c57adcf515f4bdbc212 (patch) | |
tree | 9f6e70f33565beceb956b98c261bee19731d50d2 /arch/x86/cpu/cpu.c | |
parent | b8a7c467960ffb4d5a5e1eef5f7783fb6f594542 (diff) | |
parent | fd4d564b3c80b111f18c93adb14233a6a7ddb0e9 (diff) | |
download | u-boot-imx-2c601c7208713ba9b2158c57adcf515f4bdbc212.zip u-boot-imx-2c601c7208713ba9b2158c57adcf515f4bdbc212.tar.gz u-boot-imx-2c601c7208713ba9b2158c57adcf515f4bdbc212.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot into resolve
Conflicts:
README
board/samsung/universal_c210/universal.c
drivers/misc/Makefile
drivers/power/power_fsl.c
include/configs/mx35pdk.h
include/configs/mx53loco.h
include/configs/seaboard.h
Diffstat (limited to 'arch/x86/cpu/cpu.c')
-rw-r--r-- | arch/x86/cpu/cpu.c | 49 |
1 files changed, 37 insertions, 12 deletions
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index e9bb0d7..315e87a 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -34,6 +34,7 @@ #include <common.h> #include <command.h> +#include <asm/control_regs.h> #include <asm/processor.h> #include <asm/processor-flags.h> #include <asm/interrupt.h> @@ -90,12 +91,6 @@ static void load_gdt(const u64 *boot_gdt, u16 num_entries) asm volatile("lgdtl %0\n" : : "m" (gdt)); } -void init_gd(gd_t *id, u64 *gdt_addr) -{ - id->gd_addr = (ulong)id; - setup_gdt(id, gdt_addr); -} - void setup_gdt(gd_t *id, u64 *gdt_addr) { /* CS: code, read/execute, 4 GB, base 0 */ @@ -121,6 +116,11 @@ void setup_gdt(gd_t *id, u64 *gdt_addr) load_fs(X86_GDT_ENTRY_32BIT_FS); } +int __weak x86_cleanup_before_linux(void) +{ + return 0; +} + int x86_cpu_init_f(void) { const u32 em_rst = ~X86_CR0_EM; @@ -148,16 +148,27 @@ int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r"))); void x86_enable_caches(void) { - const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD); + unsigned long cr0; - /* turn on the cache and disable write through */ - asm("movl %%cr0, %%eax\n" - "andl %0, %%eax\n" - "movl %%eax, %%cr0\n" - "wbinvd\n" : : "i" (nw_cd_rst) : "eax"); + cr0 = read_cr0(); + cr0 &= ~(X86_CR0_NW | X86_CR0_CD); + write_cr0(cr0); + wbinvd(); } void enable_caches(void) __attribute__((weak, alias("x86_enable_caches"))); +void x86_disable_caches(void) +{ + unsigned long cr0; + + cr0 = read_cr0(); + cr0 |= X86_CR0_NW | X86_CR0_CD; + wbinvd(); + write_cr0(cr0); + wbinvd(); +} +void disable_caches(void) __attribute__((weak, alias("x86_disable_caches"))); + int x86_init_cache(void) { enable_caches(); @@ -201,3 +212,17 @@ void __reset_cpu(ulong addr) generate_gpf(); /* start the show */ } void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu"))); + +int dcache_status(void) +{ + return !(read_cr0() & 0x40000000); +} + +/* Define these functions to allow ehch-hcd to function */ +void flush_dcache_range(unsigned long start, unsigned long stop) +{ +} + +void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ +} |