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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-12-02 04:49:50 +0000 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2012-12-06 14:30:39 -0800 |
| commit | 095593c0301399ae834050e2008862451a72b8b0 (patch) | |
| tree | 6ebf30f48a3ec3db8111ecfb815044db5bcfa4a4 /arch/x86/cpu/cpu.c | |
| parent | 9a7da182fa936d28658daadef83e0b8f7104487b (diff) | |
| download | u-boot-imx-095593c0301399ae834050e2008862451a72b8b0.zip u-boot-imx-095593c0301399ae834050e2008862451a72b8b0.tar.gz u-boot-imx-095593c0301399ae834050e2008862451a72b8b0.tar.bz2 | |
x86: Add basic cache operations
Add functions to enable/disable the data cache.
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/cpu.c')
| -rw-r--r-- | arch/x86/cpu/cpu.c | 38 |
1 files changed, 32 insertions, 6 deletions
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index fabfbd1..315e87a 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -34,6 +34,7 @@ #include <common.h> #include <command.h> +#include <asm/control_regs.h> #include <asm/processor.h> #include <asm/processor-flags.h> #include <asm/interrupt.h> @@ -147,16 +148,27 @@ int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r"))); void x86_enable_caches(void) { - const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD); + unsigned long cr0; - /* turn on the cache and disable write through */ - asm("movl %%cr0, %%eax\n" - "andl %0, %%eax\n" - "movl %%eax, %%cr0\n" - "wbinvd\n" : : "i" (nw_cd_rst) : "eax"); + cr0 = read_cr0(); + cr0 &= ~(X86_CR0_NW | X86_CR0_CD); + write_cr0(cr0); + wbinvd(); } void enable_caches(void) __attribute__((weak, alias("x86_enable_caches"))); +void x86_disable_caches(void) +{ + unsigned long cr0; + + cr0 = read_cr0(); + cr0 |= X86_CR0_NW | X86_CR0_CD; + wbinvd(); + write_cr0(cr0); + wbinvd(); +} +void disable_caches(void) __attribute__((weak, alias("x86_disable_caches"))); + int x86_init_cache(void) { enable_caches(); @@ -200,3 +212,17 @@ void __reset_cpu(ulong addr) generate_gpf(); /* start the show */ } void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu"))); + +int dcache_status(void) +{ + return !(read_cr0() & 0x40000000); +} + +/* Define these functions to allow ehch-hcd to function */ +void flush_dcache_range(unsigned long start, unsigned long stop) +{ +} + +void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ +} |