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| author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2014-01-09 12:22:12 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2014-01-09 12:47:15 +0900 |
| commit | 6b87abe3ac357649a990c05a6a5f9fd232cca21c (patch) | |
| tree | f121f7d1e2f4bae0b22ae92706a493c3c13c2399 /arch/sh/include/asm/cache.h | |
| parent | 8f0960e8378e0fc14d6216f60910994c217d3d57 (diff) | |
| download | u-boot-imx-6b87abe3ac357649a990c05a6a5f9fd232cca21c.zip u-boot-imx-6b87abe3ac357649a990c05a6a5f9fd232cca21c.tar.gz u-boot-imx-6b87abe3ac357649a990c05a6a5f9fd232cca21c.tar.bz2 | |
sh: sh4: Remove CONFIG_SH4A definition from source code
SH4 and SH4A are compatible. But some instructions are different from these.
In Linux kernel, It is treated as a separate CPU, but for now, I think that
there is no need to divide especially in the U-Boot.
This removes CONFIG_SH4A definition from source code, SH4A is treated as SH4.
And this fix white space.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch/sh/include/asm/cache.h')
| -rw-r--r-- | arch/sh/include/asm/cache.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h index b21dc44..0698a37 100644 --- a/arch/sh/include/asm/cache.h +++ b/arch/sh/include/asm/cache.h @@ -1,7 +1,7 @@ #ifndef __ASM_SH_CACHE_H #define __ASM_SH_CACHE_H -#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) +#if defined(CONFIG_SH4) int cache_control(unsigned int cmd); @@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; }; */ #define ARCH_DMA_MINALIGN 32 -#endif /* CONFIG_SH4 || CONFIG_SH4A */ +#endif /* CONFIG_SH4 */ /* * Use the L1 data cache line size value for the minimum DMA buffer alignment |