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author | Peter Tyser <ptyser@xes-inc.com> | 2010-04-12 22:28:09 -0500 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-04-13 09:13:16 +0200 |
commit | 8d1f268204b07e172f3cb5cee0a3974d605b0b98 (patch) | |
tree | c3359e920cc886e7060fb099bf933496aca37153 /arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S | |
parent | 819833af39a91fa1c1e8252862bbda6f5a602f7b (diff) | |
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ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Diffstat (limited to 'arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S')
-rw-r--r-- | arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S b/arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S new file mode 100644 index 0000000..4877050 --- /dev/null +++ b/arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S @@ -0,0 +1,57 @@ +/************************************** + * + * copyright @ Motorola, 1999 + * + * + * This file contains two commonly used + * lower level utility routines. + * + * The utility routines are also in other + * Kahlua device driver libraries. The + * need to be linked in only once. + **************************************/ + +#include <ppc_asm.tmpl> +#include <ppc_defs.h> + +/********************************************************** + * function: load_runtime_reg + * + * input: r3 - value of eumbbar + * r4 - register offset in embedded utility space + * + * output: r3 - register content + **********************************************************/ + .text + .align 2 + .global load_runtime_reg + +load_runtime_reg: + + xor r5,r5,r5 + or r5,r5,r3 /* save eumbbar */ + + lwbrx r3,r4,r5 + sync + + bclr 20, 0 + +/**************************************************************** + * function: store_runtime_reg + * + * input: r3 - value of eumbbar + * r4 - register offset in embedded utility space + * r5 - new value to be stored + * + ****************************************************************/ + .text + .align 2 + .global store_runtime_reg +store_runtime_reg: + + xor r0,r0,r0 + + stwbrx r5, r4, r3 + sync + + bclr 20,0 |