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authorShengzhou Liu <Shengzhou.Liu@freescale.com>2015-11-20 15:52:04 +0800
committerYork Sun <yorksun@freescale.com>2015-12-13 18:27:28 -0800
commita46b1852de967f8a7de26e0b46e864c794a18c16 (patch)
treef07b01daa4c6b1b63fec278279457bc97dfbdafc /arch/powerpc
parenta07bdad749ea080e009a82ba40e791dc7361ab54 (diff)
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fsl/ddr: updated ddr errata-A008378 for arm and power SoCs
DDR errata-A008378 applies to LS1021-20-22A-R1.0, T1023-R1.0, T1024-R1.0, T1040-42-20-22-R1.0/R1.1, it has been fixed on LS102x Rev2. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 7a5487b..674fac8 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -807,6 +807,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
#define MAX_QE_RISC 1
#define QE_NUM_OF_SNUM 28
#define CONFIG_SYS_FSL_SFP_VER_3_0
+#define CONFIG_SYS_FSL_ERRATUM_A008378
#elif defined(CONFIG_PPC_T1024) || defined(CONFIG_PPC_T1023) ||\
defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
@@ -854,6 +855,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
#define MAX_QE_RISC 1
#define QE_NUM_OF_SNUM 28
#define CONFIG_SYS_FSL_SFP_VER_3_0
+#define CONFIG_SYS_FSL_ERRATUM_A008378
#elif defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
#define CONFIG_E6500