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authorShruti Kanetkar <Shruti@Freescale.com>2013-08-15 11:25:38 -0500
committerYork Sun <yorksun@freescale.com>2013-08-20 10:38:12 -0700
commit6b44d9e5b79948a73f9fae4b84c21f62224fa46b (patch)
tree7cc38f702d5b496d993ad4f7428f7888379e9c62 /arch/powerpc
parent2f848f97d7b27a88135de98aae76531a6fdd44e6 (diff)
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powerpcv2: Print hardcoded size like print_size() does
Makes the startup output more consistent Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/cpu/mpc824x/cpu.c2
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu.c2
-rw-r--r--arch/powerpc/cpu/mpc85xx/cpu_init.c14
-rw-r--r--arch/powerpc/cpu/mpc86xx/cpu.c6
-rw-r--r--arch/powerpc/cpu/mpc8xx/cpu.c6
-rw-r--r--arch/powerpc/cpu/mpc8xx/video.c4
-rw-r--r--arch/powerpc/cpu/ppc4xx/cpu.c8
7 files changed, 21 insertions, 21 deletions
diff --git a/arch/powerpc/cpu/mpc824x/cpu.c b/arch/powerpc/cpu/mpc824x/cpu.c
index 7ed38c8..eaa4e87 100644
--- a/arch/powerpc/cpu/mpc824x/cpu.c
+++ b/arch/powerpc/cpu/mpc824x/cpu.c
@@ -45,7 +45,7 @@ int checkcpu (void)
return -1; /* no valid CPU revision info */
}
- printf (" at %s MHz: ", strmhz (buf, clock));
+ printf(" at %s MHz: ", strmhz(buf, clock));
print_size(checkicache(), " I-Cache ");
print_size(checkdcache(), " D-Cache\n");
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index b77964a..1a0196c 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -210,7 +210,7 @@ int checkcpu (void)
printf(" PME: %s MHz\n", strmhz(buf1, sysinfo.freq_pme));
#endif
- puts("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n");
+ puts("L1: D-cache 32 KiB enabled\n I-cache 32 KiB enabled\n");
#ifdef CONFIG_FSL_CORENET
/* Display the RCW, so that no one gets confused as to what RCW
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 565c281..c6e09ca 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -458,28 +458,28 @@ int cpu_init_r(void)
case 0x1:
if (ver == SVR_8540 || ver == SVR_8560 ||
ver == SVR_8541 || ver == SVR_8555) {
- puts("128 KB ");
- /* set L2E=1, L2I=1, & L2BLKSZ=1 (128 Kbyte) */
+ puts("128 KiB ");
+ /* set L2E=1, L2I=1, & L2BLKSZ=1 (128 KiBibyte) */
cache_ctl = 0xc4000000;
} else {
- puts("256 KB ");
+ puts("256 KiB ");
cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */
}
break;
case 0x2:
if (ver == SVR_8540 || ver == SVR_8560 ||
ver == SVR_8541 || ver == SVR_8555) {
- puts("256 KB ");
- /* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */
+ puts("256 KiB ");
+ /* set L2E=1, L2I=1, & L2BLKSZ=2 (256 KiBibyte) */
cache_ctl = 0xc8000000;
} else {
- puts ("512 KB ");
+ puts("512 KiB ");
/* set L2E=1, L2I=1, & L2SRAM=0 */
cache_ctl = 0xc0000000;
}
break;
case 0x3:
- puts("1024 KB ");
+ puts("1024 KiB ");
/* set L2E=1, L2I=1, & L2SRAM=0 */
cache_ctl = 0xc0000000;
break;
diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index ab3250b..3051854 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
@@ -85,8 +85,8 @@ checkcpu(void)
sysinfo.freq_localbus);
}
- puts("L1: D-cache 32 KB enabled\n");
- puts(" I-cache 32 KB enabled\n");
+ puts("L1: D-cache 32 KiB enabled\n");
+ puts(" I-cache 32 KiB enabled\n");
puts("L2: ");
if (get_l2cr() & 0x80000000) {
@@ -95,7 +95,7 @@ checkcpu(void)
#elif defined(CONFIG_MPC8641)
puts("512");
#endif
- puts(" KB enabled\n");
+ puts(" KiB enabled\n");
} else {
puts("Disabled\n");
}
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 63668b6..5c96b5f 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -202,7 +202,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
printf ("unknown MPC857 (0x%08x)", k);
#endif
- printf (" at %s MHz: ", strmhz (buf, clock));
+ printf(" at %s MHz: ", strmhz(buf, clock));
print_size(checkicache(), " I-Cache ");
print_size(checkdcache(), " D-Cache");
@@ -263,7 +263,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
if (suf)
printf ("PPC823ZTnn%s", suf);
- printf (" at %s MHz: ", strmhz (buf, clock));
+ printf(" at %s MHz: ", strmhz(buf, clock));
print_size(checkicache(), " I-Cache ");
print_size(checkdcache(), " D-Cache");
@@ -319,7 +319,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
default:
printf ("unknown MPC850 (0x%08x)", k);
}
- printf (" at %s MHz: ", strmhz (buf, clock));
+ printf(" at %s MHz: ", strmhz(buf, clock));
print_size(checkicache(), " I-Cache ");
print_size(checkdcache(), " D-Cache");
diff --git a/arch/powerpc/cpu/mpc8xx/video.c b/arch/powerpc/cpu/mpc8xx/video.c
index 02a0467..fc35158 100644
--- a/arch/powerpc/cpu/mpc8xx/video.c
+++ b/arch/powerpc/cpu/mpc8xx/video.c
@@ -1176,7 +1176,7 @@ static void *video_logo (void)
#ifndef CONFIG_FADS /* all normal boards */
/* leave one blank line */
- sprintf (info, "MPC823 CPU at %s MHz, %ld MB RAM, %ld MB Flash",
+ sprintf(info, "MPC823 CPU at %s MHz, %ld MiB RAM, %ld MiB Flash",
strmhz(temp, gd->cpu_clk),
gd->ram_size >> 20,
gd->bd->bi_flashsize >> 20 );
@@ -1187,7 +1187,7 @@ static void *video_logo (void)
video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT,
info);
- sprintf (info, "2MB FLASH - 8MB DRAM - 4MB SRAM");
+ sprintf(info, "2MiB FLASH - 8MiB DRAM - 4MiB SRAM");
video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y + VIDEO_FONT_HEIGHT * 2,
info);
#endif
diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index fe05098..78d212d 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -647,12 +647,12 @@ int checkcpu (void)
#endif
#if defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX)
- printf (" 16 kB I-Cache 16 kB D-Cache");
+ printf(" 16 KiB I-Cache 16 KiB D-Cache");
#elif defined(CONFIG_440)
- printf (" 32 kB I-Cache 32 kB D-Cache");
+ printf(" 32 KiB I-Cache 32 KiB D-Cache");
#else
- printf (" 16 kB I-Cache %d kB D-Cache",
- ((pvr | 0x00000001) == PVR_405GPR_RB) ? 16 : 8);
+ printf(" 16 KiB I-Cache %d KiB D-Cache",
+ ((pvr | 0x00000001) == PVR_405GPR_RB) ? 16 : 8);
#endif
#endif /* !defined(CONFIG_405) */