summaryrefslogtreecommitdiff
path: root/arch/powerpc/include
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2011-09-10 10:44:13 -0500
committerKumar Gala <galak@kernel.crashing.org>2011-10-03 08:52:15 -0500
commit6b3a8d0086e469c58956041e4d534b2107f5beed (patch)
tree934a23bc104cb26627e718c31e0820ad3fb514d5 /arch/powerpc/include
parentc6d339016064d014f36072898a26a333c7b61719 (diff)
downloadu-boot-imx-6b3a8d0086e469c58956041e4d534b2107f5beed.zip
u-boot-imx-6b3a8d0086e469c58956041e4d534b2107f5beed.tar.gz
u-boot-imx-6b3a8d0086e469c58956041e4d534b2107f5beed.tar.bz2
powerpc/85xx: Add support for setting up RAID engine liodns on P5020
Add support for Job Queue/Ring LIODN for the RAID Engine on P5020. Each Job Queue/Ring combo needs one id assigned for a total of 4 (2 JQs/2 Rings per JQ). This just handles RAID Engine in non-DPAA mode. Signed-off-by: Santosh Shukla <santosh.shukla@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/fsl_liodn.h11
-rw-r--r--arch/powerpc/include/asm/fsl_portals.h3
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h19
3 files changed, 32 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h
index 801571f..9ad104e 100644
--- a/arch/powerpc/include/asm/fsl_liodn.h
+++ b/arch/powerpc/include/asm/fsl_liodn.h
@@ -147,9 +147,18 @@ extern void fdt_fixup_liodn(void *blob);
offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
CONFIG_SYS_FSL_SEC_OFFSET, 0)
+#define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
+ SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
+ liodnA, \
+ offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
+ CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
+ offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
+ CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
+
extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
+extern struct liodn_id_table raide_liodn_tbl[];
extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
-extern int liodn_tbl_sz, sec_liodn_tbl_sz;
+extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
#endif
diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h
index e1c1212..8c3ea0b 100644
--- a/arch/powerpc/include/asm/fsl_portals.h
+++ b/arch/powerpc/include/asm/fsl_portals.h
@@ -35,6 +35,9 @@ enum fsl_dpaa_dev {
#ifdef CONFIG_SYS_DPAA_PME
FSL_HW_PORTAL_PME,
#endif
+#ifdef CONFIG_SYS_FSL_RAID_ENGINE
+ FSL_HW_PORTAL_RAID_ENGINE,
+#endif
};
struct qportal_info {
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 135e2d8..769ca85 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2318,6 +2318,22 @@ typedef struct ccsr_usb_phy {
} ccsr_usb_phy_t;
#define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1
+#ifdef CONFIG_SYS_FSL_RAID_ENGINE
+struct ccsr_raide {
+ u8 res0[0x543];
+ u32 liodnbr; /* LIODN Base Register */
+ u8 res1[0xab8];
+ struct {
+ struct {
+ u32 cfg0; /* cfg register 0 */
+ u32 cfg1; /* cfg register 1 */
+ u8 res1[0x3f8];
+ } ring[2];
+ u8 res[0x800];
+ } jq[2];
+};
+#endif
+
#ifdef CONFIG_FSL_CORENET
#define CONFIG_SYS_FSL_CORENET_CCM_OFFSET 0x0000
#define CONFIG_SYS_MPC85xx_DDR_OFFSET 0x8000
@@ -2348,6 +2364,7 @@ typedef struct ccsr_usb_phy {
#define CONFIG_SYS_FSL_CORENET_PME_OFFSET 0x316000
#define CONFIG_SYS_FSL_QMAN_OFFSET 0x318000
#define CONFIG_SYS_FSL_BMAN_OFFSET 0x31a000
+#define CONFIG_SYS_FSL_RAID_ENGINE_OFFSET 0x320000
#define CONFIG_SYS_FSL_FM1_OFFSET 0x400000
#define CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET 0x488000
#define CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET 0x489000
@@ -2418,6 +2435,8 @@ typedef struct ccsr_usb_phy {
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_BMAN_OFFSET)
#define CONFIG_SYS_FSL_CORENET_PME_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_PME_OFFSET)
+#define CONFIG_SYS_FSL_RAID_ENGINE_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
#define CONFIG_SYS_MPC85xx_GUTS_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET)
#define CONFIG_SYS_FSL_CORENET_CCM_ADDR \