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| author | Dipen Dudhat <Dipen.Dudhat@freescale.com> | 2011-03-22 09:27:39 +0530 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-09-29 19:01:04 -0500 |
| commit | 52f90dad60d2252ec34c208cae1100bc75201ec7 (patch) | |
| tree | ac51b1ccc0fc541ee8ace1dfc6fe51f0dd8778ec /arch/powerpc/include | |
| parent | 49249e137daeec4d51c99aa69a8459d2f11cd94d (diff) | |
| download | u-boot-imx-52f90dad60d2252ec34c208cae1100bc75201ec7.zip u-boot-imx-52f90dad60d2252ec34c208cae1100bc75201ec7.tar.gz u-boot-imx-52f90dad60d2252ec34c208cae1100bc75201ec7.tar.bz2 | |
nand: Freescale Integrated Flash Controller NAND support
Add NAND support (including spl) on IFC, such as is found on the p1010.
Note that using hardware ECC on IFC with small-page NAND (which is what
comes on the p1010rdb reference board) means there will be insufficient
OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should
work, as it does not use OOB for anything but ECC.
When hardware ECC is not enabled in CSOR, software ECC is now used.
Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
[scottwood@freescale.com: ECC rework and misc fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_ifc.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/fsl_ifc.h b/arch/powerpc/include/asm/fsl_ifc.h index d4d9809..fb12363 100644 --- a/arch/powerpc/include/asm/fsl_ifc.h +++ b/arch/powerpc/include/asm/fsl_ifc.h @@ -69,6 +69,7 @@ */ /* Enable ECC Encoder */ #define CSOR_NAND_ECC_ENC_EN 0x80000000 +#define CSOR_NAND_ECC_MODE_MASK 0x30000000 /* 4 bit correction per 520 Byte sector */ #define CSOR_NAND_ECC_MODE_4 0x00000000 /* 8 bit correction per 528 Byte sector */ @@ -857,10 +858,7 @@ struct fsl_ifc_nand { u32 res19[0x10]; u32 nand_fsr; u32 res20; - u32 nand_eccstat0; - u32 nand_eccstat1; - u32 nand_eccstat2; - u32 nand_eccstat3; + u32 nand_eccstat[4]; u32 res21[0x20]; u32 nanndcr; u32 res22[0x2]; |