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author | Tom Rini <trini@konsulko.com> | 2015-03-05 16:41:04 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2015-03-05 20:50:30 -0500 |
commit | 1c6f6a6ef9f3edf38360a204bc62de83a8039df3 (patch) | |
tree | 8a16e261dc99f2033e5842593fe494ade85599f6 /arch/powerpc/include/asm/immap_85xx.h | |
parent | fc196d0e9b917762f25f6226a4adf93741339efb (diff) | |
parent | e04916a721a2069fc770412c57974d02e153ad18 (diff) | |
download | u-boot-imx-1c6f6a6ef9f3edf38360a204bc62de83a8039df3.zip u-boot-imx-1c6f6a6ef9f3edf38360a204bc62de83a8039df3.tar.gz u-boot-imx-1c6f6a6ef9f3edf38360a204bc62de83a8039df3.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'arch/powerpc/include/asm/immap_85xx.h')
-rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 22 |
1 files changed, 6 insertions, 16 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index ace1d12..0c9d85e 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -17,6 +17,7 @@ #include <asm/fsl_i2c.h> #include <fsl_ifc.h> #include <fsl_sec.h> +#include <fsl_sfp.h> #include <asm/fsl_lbc.h> #include <asm/fsl_fman.h> #include <fsl_immap.h> @@ -2823,21 +2824,6 @@ struct ccsr_pman { u8 res_f4[0xf0c]; }; #endif -#ifdef CONFIG_SYS_FSL_SFP_VER_3_0 -struct ccsr_sfp_regs { - u32 ospr; /* 0x200 */ - u32 reserved0[14]; - u32 srk_hash[8]; /* 0x23c Super Root Key Hash */ - u32 oem_uid; /* 0x9c OEM Unique ID */ - u8 reserved2[0x04]; - u32 ovpr; /* 0xA4 Intent To Secure */ - u8 reserved4[0x08]; - u32 fsl_uid; /* 0xB0 FSL Unique ID */ - u8 reserved5[0x04]; - u32 fsl_spfr0; /* Scratch Pad Fuse Register 0 */ - u32 fsl_spfr1; /* Scratch Pad Fuse Register 1 */ -}; -#endif #ifdef CONFIG_FSL_CORENET #define CONFIG_SYS_FSL_CORENET_CCM_OFFSET 0x0000 @@ -2897,6 +2883,7 @@ struct ccsr_sfp_regs { #define CONFIG_SYS_MPC85xx_SATA2_OFFSET 0x221000 #define CONFIG_SYS_FSL_SEC_OFFSET 0x300000 #define CONFIG_SYS_FSL_JR0_OFFSET 0x301000 +#define CONFIG_SYS_SEC_MON_OFFSET 0x314000 #define CONFIG_SYS_FSL_CORENET_PME_OFFSET 0x316000 #define CONFIG_SYS_FSL_QMAN_OFFSET 0x318000 #define CONFIG_SYS_FSL_BMAN_OFFSET 0x31a000 @@ -2964,7 +2951,7 @@ struct ccsr_sfp_regs { #endif #define CONFIG_SYS_MPC85xx_SERDES2_OFFSET 0xE3100 #define CONFIG_SYS_MPC85xx_SERDES1_OFFSET 0xE3000 -#define CONFIG_SYS_SNVS_OFFSET 0xE6000 +#define CONFIG_SYS_SEC_MON_OFFSET 0xE6000 #define CONFIG_SYS_SFP_OFFSET 0xE7000 #define CONFIG_SYS_MPC85xx_CPM_OFFSET 0x80000 #define CONFIG_SYS_FSL_QMAN_OFFSET 0x88000 @@ -3094,6 +3081,9 @@ struct ccsr_sfp_regs { #define CONFIG_SYS_SFP_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_SFP_OFFSET) +#define CONFIG_SYS_SEC_MON_ADDR \ + (CONFIG_SYS_IMMR + CONFIG_SYS_SEC_MON_OFFSET) + #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) #define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET) |