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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-30 23:49:17 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-30 23:49:17 +0200 |
commit | 1c27059a2f7158a9c9a8778535b030935d75179d (patch) | |
tree | bf577d5c9f0da21c5d57feed1091214e54c39dec /arch/powerpc/include/asm/fsl_ddr_dimm_params.h | |
parent | 8f0732ac3dc3bdbbcada313dc4b4b38d5d2c376a (diff) | |
parent | 4668a086bb0a769b741e3a4ffab85f1c41c7cdb8 (diff) | |
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Merge remote-tracking branch 'u-boot/master'
Diffstat (limited to 'arch/powerpc/include/asm/fsl_ddr_dimm_params.h')
-rw-r--r-- | arch/powerpc/include/asm/fsl_ddr_dimm_params.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h index 982b809..ffe4db8 100644 --- a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h +++ b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h @@ -43,6 +43,7 @@ typedef struct dimm_params_s { /* DIMM timing parameters */ unsigned int mtb_ps; /* medium timebase ps, only for ddr3 */ + unsigned int ftb_10th_ps; /* fine timebase, in 1/10 ps, only for ddr3 */ unsigned int tAA_ps; /* minimum CAS latency time, only for ddr3 */ unsigned int tFAW_ps; /* four active window delay, only for ddr3 */ |