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author | Kumar Gala <galak@kernel.crashing.org> | 2010-04-20 10:02:24 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2010-04-26 22:37:57 -0500 |
commit | 7e1afb62a7e68843248b9a76a265c9193e716768 (patch) | |
tree | c22e8fe0d1eb2bff4d70e77637fc632435efc436 /arch/powerpc/cpu | |
parent | 3f0202ed13add5fd6e2ed66fcb3f5e1228cdf766 (diff) | |
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ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ
The MPC83xx SERDES control is different from the other FSL PPC chips.
For now lets split it out so we can standardize on interfaces for
determining of a device on SERDES is configured.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r-- | arch/powerpc/cpu/mpc83xx/serdes.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c index 64033fe..fecfc80 100644 --- a/arch/powerpc/cpu/mpc83xx/serdes.c +++ b/arch/powerpc/cpu/mpc83xx/serdes.c @@ -15,7 +15,7 @@ #include <config.h> #include <common.h> #include <asm/io.h> -#include <asm/fsl_serdes.h> +#include <asm/fsl_mpc83xx_serdes.h> /* SerDes registers */ #define FSL_SRDSCR0_OFFS 0x0 |