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| author | Kumar Gala <galak@kernel.crashing.org> | 2010-07-14 10:04:21 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-26 13:16:08 -0500 |
| commit | 79e4e6480b359cb28129cecfa2cae0ef9cccf803 (patch) | |
| tree | 45345be233f602736fd7df42c579b1b3abab6768 /arch/powerpc/cpu/ppc4xx/xilinx_irq.c | |
| parent | fd3c9befa83eecf6e7c6ef03c501159fbf754143 (diff) | |
| download | u-boot-imx-79e4e6480b359cb28129cecfa2cae0ef9cccf803.zip u-boot-imx-79e4e6480b359cb28129cecfa2cae0ef9cccf803.tar.gz u-boot-imx-79e4e6480b359cb28129cecfa2cae0ef9cccf803.tar.bz2 | |
powerpc/8xxx: Enabled hwconfig for memory interleaving
Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with
hwconfig parameters. The syntax is
setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>"
The mode values for memory controller interleaving are
cacheline
page
bank
superbank
The mode values for bank interleaving are
cs0_cs1
cs2_cs3
cs0_cs1_and_cs2_cs3
cs0_cs1_cs2_cs3
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/ppc4xx/xilinx_irq.c')
0 files changed, 0 insertions, 0 deletions