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author | Stefan Roese <sr@denx.de> | 2010-10-04 11:09:40 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2010-10-20 10:07:55 +0200 |
commit | f472069fb71c5259594bea200fb4a5ebca04c89a (patch) | |
tree | 1d54263b1919f5b69b49a51a39118613b03adbcd /arch/powerpc/cpu/ppc4xx/traps.c | |
parent | 11c8dd36edcc82564a19dbd0103302df66d66db0 (diff) | |
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ppc4xx: Change tsr/tcr macros to upper case
Remove uneccessary functions to access the TCR/TSR registers as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/powerpc/cpu/ppc4xx/traps.c')
-rw-r--r-- | arch/powerpc/cpu/ppc4xx/traps.c | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/arch/powerpc/cpu/ppc4xx/traps.c b/arch/powerpc/cpu/ppc4xx/traps.c index b5562ad..9baa7a1 100644 --- a/arch/powerpc/cpu/ppc4xx/traps.c +++ b/arch/powerpc/cpu/ppc4xx/traps.c @@ -46,15 +46,6 @@ extern unsigned long search_exception_table(unsigned long); */ #define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize) -static __inline__ void set_tsr(unsigned long val) -{ -#if defined(CONFIG_440) - asm volatile("mtspr 0x150, %0" : : "r" (val)); -#else - asm volatile("mttsr %0" : : "r" (val)); -#endif -} - static __inline__ unsigned long get_esr(void) { unsigned long val; @@ -364,7 +355,7 @@ DecrementerPITException(struct pt_regs *regs) /* * Reset PIT interrupt */ - set_tsr(0x08000000); + mtspr(SPRN_TSR, 0x08000000); /* * Call timer_interrupt routine in interrupts.c |