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author | York Sun <yorksun@freescale.com> | 2011-08-26 11:32:44 -0700 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-09-29 19:01:06 -0500 |
commit | d29d17d7badcf90a31e5d6d1d9a82838ea039a42 (patch) | |
tree | 9713d45bee6808ec043a23522f5af0329c82005d /arch/powerpc/cpu/mpc8xxx/ddr/util.c | |
parent | 4e57382faa4bcad285baee21737de2c99ba6baad (diff) | |
download | u-boot-imx-d29d17d7badcf90a31e5d6d1d9a82838ea039a42.zip u-boot-imx-d29d17d7badcf90a31e5d6d1d9a82838ea039a42.tar.gz u-boot-imx-d29d17d7badcf90a31e5d6d1d9a82838ea039a42.tar.bz2 |
powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
Unified DDR driver is maintained for better performance, robustness and bug
fixes. Upgrading to use unified DDR driver for MPC83xx takes advantage of
overall improvement. It requires changes for board files to customize
platform-dependent parameters.
To utilize the unified DDR driver, a board needs to define CONFIG_FSL_DDRx
in the header file. No more boards will be accepted without such definition.
Note: the workaround for erratum DDR6 for the very old MPC834x Rev 1.0/1.1
and MPC8360 Rev 1.1/1.2 parts is not migrated to unified driver.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu/mpc8xxx/ddr/util.c')
-rw-r--r-- | arch/powerpc/cpu/mpc8xxx/ddr/util.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c b/arch/powerpc/cpu/mpc8xxx/ddr/util.c index c644131..eb6a17a 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/util.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/util.c @@ -129,10 +129,13 @@ fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params, void board_add_ram_info(int use_default) { -#if defined(CONFIG_MPC85xx) - volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); +#if defined(CONFIG_MPC83xx) + immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + ccsr_ddr_t *ddr = (void *)&immap->ddr; +#elif defined(CONFIG_MPC85xx) + ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); #elif defined(CONFIG_MPC86xx) - volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC86xx_DDR_ADDR); + ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC86xx_DDR_ADDR); #endif #if (CONFIG_NUM_DDR_CONTROLLERS > 1) uint32_t cs0_config = in_be32(&ddr->cs0_config); |