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| author | Timur Tabi <timur@tabi.org> | 2013-03-25 07:30:08 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-02 16:56:45 -0500 |
| commit | ca9131c0569a98b6538c5a2d78c3d845bdf54bae (patch) | |
| tree | d8f07a18bb908cc87bc6a0280060827d81eaf4c4 /arch/powerpc/cpu/mpc85xx | |
| parent | 7d83b79c2bdfeca79eaf1b536ada8ad0de1d204a (diff) | |
| download | u-boot-imx-ca9131c0569a98b6538c5a2d78c3d845bdf54bae.zip u-boot-imx-ca9131c0569a98b6538c5a2d78c3d845bdf54bae.tar.gz u-boot-imx-ca9131c0569a98b6538c5a2d78c3d845bdf54bae.tar.bz2 | |
powerpc/85xx: add SerDes bank 4 lanes
Only some chips have four SerDes banks, so don't define lanes for a bank
that doesn't exist.
Signed-off-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 825a292..b621adf 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -103,6 +103,10 @@ static const struct { { 22, 168, FSL_SRDS_BANK_3 }, { 23, 169, FSL_SRDS_BANK_3 }, #endif +#if SRDS_MAX_BANK > 3 + { 24, 175, FSL_SRDS_BANK_4 }, + { 25, 176, FSL_SRDS_BANK_4 }, +#endif }; int serdes_get_lane_idx(int lane) |