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| author | Scott Wood <scottwood@freescale.com> | 2012-08-17 19:46:29 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2012-11-26 15:41:23 -0600 |
| commit | 59629c2897eb84c4550cf95b49e0761fbd23cef0 (patch) | |
| tree | 31bbee2f241b769b32821a5040c4c4fcbbe8eb37 /arch/powerpc/cpu/mpc85xx | |
| parent | 8bc50f0b6d376c0d6280c9de625f04368892f4b4 (diff) | |
| download | u-boot-imx-59629c2897eb84c4550cf95b49e0761fbd23cef0.zip u-boot-imx-59629c2897eb84c4550cf95b49e0761fbd23cef0.tar.gz u-boot-imx-59629c2897eb84c4550cf95b49e0761fbd23cef0.tar.bz2 | |
spl/mpc85xx: move udelay to cpu code
It applies to non-Freescale 85xx boards as well as Freescale boards,
so it doesn't belong in board/freescale. Plus, it needs to come out
of nand_spl if it's to be used by the new SPL.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c index bf7a6f6..0589497 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c @@ -21,9 +21,13 @@ */ #include <common.h> +#include <asm/processor.h> +#include <asm/global_data.h> #include <asm/fsl_ifc.h> #include <asm/io.h> +DECLARE_GLOBAL_DATA_PTR; + void cpu_init_f(void) { #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) @@ -40,3 +44,16 @@ void cpu_init_f(void) (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE)); #endif } + +#ifndef CONFIG_SYS_FSL_TBCLK_DIV +#define CONFIG_SYS_FSL_TBCLK_DIV 8 +#endif + +void udelay(unsigned long usec) +{ + u32 ticks_per_usec = gd->bus_clk / (CONFIG_SYS_FSL_TBCLK_DIV * 1000000); + u32 ticks = ticks_per_usec * usec; + u32 s = mfspr(SPRN_TBRL); + + while ((mfspr(SPRN_TBRL) - s) < ticks); +} |