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| author | Nikhil Badola <nikhil.badola@freescale.com> | 2015-06-26 16:59:21 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-08-03 12:06:38 -0700 |
| commit | ca7fb12cc18e80d14cca9570aec1d544f5d8c169 (patch) | |
| tree | 931afc9c2b8d3d0ced54f34ff4d4831b8e46c117 /arch/openrisc/cpu | |
| parent | 56848428a88f89420ae7acc04bb5805e70c430a3 (diff) | |
| download | u-boot-imx-ca7fb12cc18e80d14cca9570aec1d544f5d8c169.zip u-boot-imx-ca7fb12cc18e80d14cca9570aec1d544f5d8c169.tar.gz u-boot-imx-ca7fb12cc18e80d14cca9570aec1d544f5d8c169.tar.bz2 | |
armv8/lsch3/config: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A
Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by
USB XHCI stack for alignment
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/openrisc/cpu')
0 files changed, 0 insertions, 0 deletions