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authorThomas Chou <thomas@wytron.com.tw>2015-10-18 20:03:53 +0800
committerThomas Chou <thomas@wytron.com.tw>2015-10-23 07:59:03 +0800
commit7cacb64a354a1d996ba55e5e35b95f111f00648d (patch)
treede977e431ce2308527d2b7dddc987560dbb36154 /arch/nios2
parentb8112091bbd03835920787bbe474d796248a5999 (diff)
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nios2: convert dma_alloc_coherent to use malloc_cache_aligned
Convert dma_alloc_coherent to use memalign. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'arch/nios2')
-rw-r--r--arch/nios2/include/asm/dma-mapping.h27
1 files changed, 14 insertions, 13 deletions
diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h
index 1350e3b..1562d35 100644
--- a/arch/nios2/include/asm/dma-mapping.h
+++ b/arch/nios2/include/asm/dma-mapping.h
@@ -1,23 +1,24 @@
#ifndef __ASM_NIOS2_DMA_MAPPING_H
#define __ASM_NIOS2_DMA_MAPPING_H
-/* dma_alloc_coherent() return cache-line aligned allocation which is mapped
+#include <memalign.h>
+#include <asm/io.h>
+
+/*
+ * dma_alloc_coherent() return cache-line aligned allocation which is mapped
* to uncached io region.
- *
- * IO_REGION_BASE should be defined in board config header file
- * 0x80000000 for nommu, 0xe0000000 for mmu
*/
-
static inline void *dma_alloc_coherent(size_t len, unsigned long *handle)
{
- void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE);
+ unsigned long addr = (unsigned long)malloc_cache_aligned(len);
+
if (!addr)
- return 0;
- flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE);
- *handle = ((unsigned long)addr +
- (CONFIG_SYS_DCACHELINE_SIZE - 1)) &
- ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE);
- return (void *)(*handle | IO_REGION_BASE);
-}
+ return NULL;
+
+ invalidate_dcache_range(addr, addr + len);
+ if (handle)
+ *handle = addr;
+ return ioremap(addr, len);
+}
#endif /* __ASM_NIOS2_DMA_MAPPING_H */