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authorDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2016-01-09 18:34:14 +0100
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2016-11-30 16:11:46 +0100
commitbd60252811c3c81dd0a32c0871b9116ba160190f (patch)
treeebdbe28f9b8f75e54e30b6de07bc1768b319312d /arch/mips
parent67588bdade302b9c26e00f6a2ceaccaf8fd98fba (diff)
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MIPS: reserve space for exception vectors
In order to set own exception handlers, a table with the exception vectors must be built in DRAM and the CPU EBase register must be set to the base address of this table. Reserve the space above the stack and use gd->irq_sp as storage for the exception base address. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/lib/Makefile1
-rw-r--r--arch/mips/lib/stack.c19
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index b7ce5df..02607f7 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -7,6 +7,7 @@
obj-y += cache.o
obj-y += cache_init.o
+obj-y += stack.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
diff --git a/arch/mips/lib/stack.c b/arch/mips/lib/stack.c
new file mode 100644
index 0000000..c80f5fe
--- /dev/null
+++ b/arch/mips/lib/stack.c
@@ -0,0 +1,19 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int arch_reserve_stacks(void)
+{
+ /* reserve space for exception vector table */
+ gd->start_addr_sp -= 0x500;
+ gd->start_addr_sp &= ~0xFFF;
+ gd->irq_sp = gd->start_addr_sp;
+ debug("Reserving %d Bytes for exception vector at: %08lx\n",
+ 0x500, gd->start_addr_sp);
+
+ return 0;
+}