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| author | Bryan Wu <pengw@nvidia.com> | 2016-08-11 16:28:27 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2016-08-15 10:26:14 -0700 |
| commit | 027638d3cf6bf55996b50e41faccd51789a04eb0 (patch) | |
| tree | 762e6006d4bd69a5d01889aedb9f971957df3a02 /arch/mips/mach-au1x00/au1x00_eth.c | |
| parent | 06264a79b4ed8155e8746dba10b707d588ca6e9c (diff) | |
| download | u-boot-imx-027638d3cf6bf55996b50e41faccd51789a04eb0.zip u-boot-imx-027638d3cf6bf55996b50e41faccd51789a04eb0.tar.gz u-boot-imx-027638d3cf6bf55996b50e41faccd51789a04eb0.tar.bz2 | |
ARM: tegra: reduce CSITE clock from 204M to 136M
The L4T kernel complains about a CSITE clock rate above 144MHz, presumably
because the HW is only characterized for a clock less than that. Adjust the
rate to 136MHz to avoid the warning and stay in spec.
Signed-off-by: Bryan Wu <pengw@nvidia.com>
(swarren, re-wrote commit description)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/mips/mach-au1x00/au1x00_eth.c')
0 files changed, 0 insertions, 0 deletions