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authorTom Rini <trini@konsulko.com>2016-05-31 10:26:14 -0400
committerTom Rini <trini@konsulko.com>2016-05-31 10:26:14 -0400
commitda6e2fab5db000e31187aa4c9495c244011792c1 (patch)
tree6ae6a6ce2ad21c15e0cc560275f676e2aeb42767 /arch/mips/mach-ath79/ar933x/ddr.c
parent653bb0d92eefb7255c88a8a251a3dbabec9345b6 (diff)
parentf1b65c98b0a134ce92c38141b917fd3a210ee535 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mips
Diffstat (limited to 'arch/mips/mach-ath79/ar933x/ddr.c')
-rw-r--r--arch/mips/mach-ath79/ar933x/ddr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/mach-ath79/ar933x/ddr.c b/arch/mips/mach-ath79/ar933x/ddr.c
index 7f20d34..2a25e23 100644
--- a/arch/mips/mach-ath79/ar933x/ddr.c
+++ b/arch/mips/mach-ath79/ar933x/ddr.c
@@ -10,7 +10,7 @@
#include <asm/addrspace.h>
#include <asm/types.h>
#include <mach/ar71xx_regs.h>
-#include <mach/reset.h>
+#include <mach/ath79.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -114,7 +114,7 @@ void ddr_init(void)
writel(DDR_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG);
writel(DDR_CONF2_REG_VAL, regs + AR71XX_DDR_REG_CONFIG2);
- val = get_bootstrap();
+ val = ath79_get_bootstrap();
if (val & AR933X_BOOTSTRAP_DDR2) {
/* AHB maximum timeout */
writel(0xfffff, regs + AR933X_DDR_REG_TIMEOUT_MAX);