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| author | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-01-12 21:48:26 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-01-16 21:06:46 +0100 |
| commit | a3ab2ae7f6c8724152f05144946a76b727fb1c7e (patch) | |
| tree | c779e8946259fc769f3ada4ec6f6880b953e3162 /arch/mips/lib/cache.c | |
| parent | 23ff8633fd8ca75d2ffd4595b9c72bb1a5fdbd20 (diff) | |
| download | u-boot-imx-a3ab2ae7f6c8724152f05144946a76b727fb1c7e.zip u-boot-imx-a3ab2ae7f6c8724152f05144946a76b727fb1c7e.tar.gz u-boot-imx-a3ab2ae7f6c8724152f05144946a76b727fb1c7e.tar.bz2 | |
MIPS: sync processor and register definitions with linux-4.4
Update definitions for processor, registers as well as assemby
macros.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/mips/lib/cache.c')
| -rw-r--r-- | arch/mips/lib/cache.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index e245614..bf8ff59 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -27,7 +27,7 @@ static inline unsigned long icache_line_size(void) { unsigned long conf1, il; conf1 = read_c0_config1(); - il = (conf1 & MIPS_CONF1_IL) >> MIPS_CONF1_IL_SHIFT; + il = (conf1 & MIPS_CONF1_IL) >> MIPS_CONF1_IL_SHF; if (!il) return 0; return 2 << il; @@ -37,7 +37,7 @@ static inline unsigned long dcache_line_size(void) { unsigned long conf1, dl; conf1 = read_c0_config1(); - dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHIFT; + dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHF; if (!dl) return 0; return 2 << dl; |