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author | Tom Rini <trini@ti.com> | 2013-07-24 09:30:46 -0400 |
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committer | Tom Rini <trini@ti.com> | 2013-07-25 08:51:48 -0400 |
commit | 230187ce266889ad465b39ded6717805379e7ffe (patch) | |
tree | da91d96b28eba97d7e14ffee800fc1003dac880d /arch/mips/cpu/mips32/start.S | |
parent | 8dde4ca90ee12a9dd40f42b80e51107ecd26ebe0 (diff) | |
parent | db2c86d7d71d1be0ac0fe702493faf9302639235 (diff) | |
download | u-boot-imx-230187ce266889ad465b39ded6717805379e7ffe.zip u-boot-imx-230187ce266889ad465b39ded6717805379e7ffe.tar.gz u-boot-imx-230187ce266889ad465b39ded6717805379e7ffe.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-mips
Conflict over SPDX changes means that one change was effectively dropped
as it was fixing typos in a removed hunk of text.
Conflicts:
arch/mips/cpu/mips64/start.S
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/mips/cpu/mips32/start.S')
-rw-r--r-- | arch/mips/cpu/mips32/start.S | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S index b08a897..70ad198 100644 --- a/arch/mips/cpu/mips32/start.S +++ b/arch/mips/cpu/mips32/start.S @@ -41,7 +41,7 @@ _start: nop .org 0x10 -#ifdef CONFIG_SYS_XWAY_EBU_BOOTCFG +#if defined(CONFIG_SYS_XWAY_EBU_BOOTCFG) /* * Almost all Lantiq XWAY SoC devices have an external bus unit (EBU) to * access external NOR flashes. If the board boots from NOR flash the @@ -51,6 +51,12 @@ _start: */ .word CONFIG_SYS_XWAY_EBU_BOOTCFG .word 0x0 +#elif defined(CONFIG_QEMU_MALTA) + /* + * Linux expects the Board ID here. + */ + .word 0x00000420 # 0x420 (Malta Board with CoreLV) + .word 0x00000000 #endif .org 0x200 @@ -199,19 +205,19 @@ in_ram: * generated by GNU ld. Skip these reserved entries from relocation. */ lw t3, -4(t0) # t3 <-- num_got_entries - lw t4, -8(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_ - add t4, s1 # t4 now holds relocated _G_O_T_ - addi t4, t4, 8 # skipping first two entries + lw t8, -8(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_ + add t8, s1 # t8 now holds relocated _G_O_T_ + addi t8, t8, 8 # skipping first two entries li t2, 2 1: - lw t1, 0(t4) + lw t1, 0(t8) beqz t1, 2f add t1, s1 - sw t1, 0(t4) + sw t1, 0(t8) 2: addi t2, 1 blt t2, t3, 1b - addi t4, 4 + addi t8, 4 /* Update dynamic relocations */ lw t1, -16(t0) # t1 <-- __rel_dyn_start @@ -221,19 +227,19 @@ in_ram: addi t1, 8 1: - lw t3, -4(t1) # t3 <-- relocation info + lw t8, -4(t1) # t8 <-- relocation info - sub t3, 3 - bnez t3, 2f # skip non R_MIPS_REL32 entries + li t3, 3 + bne t8, t3, 2f # skip non R_MIPS_REL32 entries nop lw t3, -8(t1) # t3 <-- location to fix up in FLASH - lw t4, 0(t3) # t4 <-- original pointer - add t4, s1 # t4 <-- adjusted pointer + lw t8, 0(t3) # t8 <-- original pointer + add t8, s1 # t8 <-- adjusted pointer add t3, s1 # t3 <-- location to fix up in RAM - sw t4, 0(t3) + sw t8, 0(t3) 2: blt t1, t2, 1b |