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| author | Tom Rini <trini@konsulko.com> | 2016-01-16 21:45:31 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-01-16 21:45:31 -0500 |
| commit | b57843e68804c2d53d2cff2b8b2238e37b388faa (patch) | |
| tree | 1edb3e718d02661b29071fd8b7375082655d3c9e /arch/mips/Kconfig | |
| parent | b8c5b47296414c7cef84a879c0c90202bc22720c (diff) | |
| parent | 0e0efb40b874633360967f532eb1ed59ad02adbe (diff) | |
| download | u-boot-imx-b57843e68804c2d53d2cff2b8b2238e37b388faa.zip u-boot-imx-b57843e68804c2d53d2cff2b8b2238e37b388faa.tar.gz u-boot-imx-b57843e68804c2d53d2cff2b8b2238e37b388faa.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mips
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7f7e258..1b39c4c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -28,6 +28,7 @@ config TARGET_MALTA select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 select SWAP_IO_SPACE + select MIPS_L1_CACHE_SHIFT_6 config TARGET_VCT bool "Support vct" @@ -43,6 +44,7 @@ config TARGET_DBAU1X00 select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 select SYS_MIPS_CACHE_INIT_RAM_LOAD + select MIPS_TUNE_4KC config TARGET_PB1X00 bool "Support pb1x00" @@ -50,7 +52,7 @@ config TARGET_PB1X00 select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 select SYS_MIPS_CACHE_INIT_RAM_LOAD - + select MIPS_TUNE_4KC endchoice @@ -174,6 +176,15 @@ config CPU_MIPS64 bool default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 +config MIPS_TUNE_4KC + bool + +config MIPS_TUNE_14KC + bool + +config MIPS_TUNE_24KC + bool + config 32BIT bool @@ -186,6 +197,26 @@ config SWAP_IO_SPACE config SYS_MIPS_CACHE_INIT_RAM_LOAD bool +config MIPS_L1_CACHE_SHIFT_4 + bool + +config MIPS_L1_CACHE_SHIFT_5 + bool + +config MIPS_L1_CACHE_SHIFT_6 + bool + +config MIPS_L1_CACHE_SHIFT_7 + bool + +config MIPS_L1_CACHE_SHIFT + int + default "7" if MIPS_L1_CACHE_SHIFT_7 + default "6" if MIPS_L1_CACHE_SHIFT_6 + default "5" if MIPS_L1_CACHE_SHIFT_5 + default "4" if MIPS_L1_CACHE_SHIFT_4 + default "5" + endif endmenu |