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| author | Paul Burton <paul.burton@imgtec.com> | 2016-09-21 11:18:48 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-09-21 15:04:04 +0200 |
| commit | 8cb4817d0f076605c5126f0925f6c7fdb0461bf6 (patch) | |
| tree | 2a0ee6d92cec0d877ec0a3690b8d75ddbde27168 /arch/blackfin/include/asm/mach-bf506/BF504_def.h | |
| parent | 0dfe04d6c8a52624c5404392168e52fe70fe0dc9 (diff) | |
| download | u-boot-imx-8cb4817d0f076605c5126f0925f6c7fdb0461bf6.zip u-boot-imx-8cb4817d0f076605c5126f0925f6c7fdb0461bf6.tar.gz u-boot-imx-8cb4817d0f076605c5126f0925f6c7fdb0461bf6.tar.bz2 | |
MIPS: Probe cache line sizes once during boot
Rather than probing the cache line sizes on every call of any cache
maintenance function, probe them once during boot & store the values in
the global data structure for later use. This will reduce the overhead
of the cache maintenance functions, which isn't a big deal yet but
becomes more important once L2 caches which may expose their properties
via coprocessor 2 or the CM are supported.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/blackfin/include/asm/mach-bf506/BF504_def.h')
0 files changed, 0 insertions, 0 deletions