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authorSonic Zhang <sonic.zhang@analog.com>2012-08-16 11:56:14 +0800
committersonic <sonic@sonic-linuxvm.(none)>2013-03-04 13:42:06 +0800
commita2979dcdbeb39a01dc888090d2c736c2ad3f548d (patch)
treea682537c30714af45a998e2c3cedbe495de05e52 /arch/blackfin/cpu/cpu.c
parent3ead92c571e7e17ca1c525c0fcd40e58901c5655 (diff)
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blackfin: bf60x: Port blackfin core architecture code to boot on bf60x.
Set up clocks, DDR controller, Nor flash controller, reboot, serial port. Add new SPI boot modes. Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
Diffstat (limited to 'arch/blackfin/cpu/cpu.c')
-rw-r--r--arch/blackfin/cpu/cpu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/blackfin/cpu/cpu.c b/arch/blackfin/cpu/cpu.c
index 6a0bcca..b9fdb07 100644
--- a/arch/blackfin/cpu/cpu.c
+++ b/arch/blackfin/cpu/cpu.c
@@ -68,7 +68,9 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
/* Reset upon a double exception rather than just hanging.
* Do not do bfin_read on SWRST as that will reset status bits.
*/
+# ifdef SWRST
bfin_write_SWRST(DOUBLE_FAULT);
+# endif
#endif
serial_early_puts("Board init flash\n");
@@ -92,7 +94,7 @@ int irq_init(void)
#elif defined(SICA_IMASK0)
bfin_write_SICA_IMASK0(0);
bfin_write_SICA_IMASK1(0);
-#else
+#elif defined(SIC_IMASK)
bfin_write_SIC_IMASK(0);
#endif
/* Set up a dummy NMI handler if needed. */