From a2979dcdbeb39a01dc888090d2c736c2ad3f548d Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Thu, 16 Aug 2012 11:56:14 +0800 Subject: blackfin: bf60x: Port blackfin core architecture code to boot on bf60x. Set up clocks, DDR controller, Nor flash controller, reboot, serial port. Add new SPI boot modes. Signed-off-by: Bob Liu Signed-off-by: Sonic Zhang Signed-off-by: Sonic Zhang --- arch/blackfin/cpu/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/blackfin/cpu/cpu.c') diff --git a/arch/blackfin/cpu/cpu.c b/arch/blackfin/cpu/cpu.c index 6a0bcca..b9fdb07 100644 --- a/arch/blackfin/cpu/cpu.c +++ b/arch/blackfin/cpu/cpu.c @@ -68,7 +68,9 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr) /* Reset upon a double exception rather than just hanging. * Do not do bfin_read on SWRST as that will reset status bits. */ +# ifdef SWRST bfin_write_SWRST(DOUBLE_FAULT); +# endif #endif serial_early_puts("Board init flash\n"); @@ -92,7 +94,7 @@ int irq_init(void) #elif defined(SICA_IMASK0) bfin_write_SICA_IMASK0(0); bfin_write_SICA_IMASK1(0); -#else +#elif defined(SIC_IMASK) bfin_write_SIC_IMASK(0); #endif /* Set up a dummy NMI handler if needed. */ -- cgit v1.1