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authorPaul Burton <paul.burton@imgtec.com>2016-09-21 11:18:55 +0100
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2016-09-21 15:04:04 +0200
commit7953354b07bba8fa9599bf5d212308e6cdf9cbe2 (patch)
treeea7c5e9e3bb9f02a999f0c4c39392fbabb1607d3 /arch/avr32/lib
parent4baa0ab67d504f3b4318f999631e3f83d0c52c4a (diff)
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MIPS: Join the coherent domain when a CM is present
MIPS Linux expects the bootloader to leave the boot CPU a member of the coherent domain when running on a system with a CM, and we will need to do so if we wish to make use of IOCUs to have cache-coherent DMA in U-Boot (and on some systems there is no choice in that matter). When a CM is present, join the coherent domain after completing cache initialisation. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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