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authorRobert P. J. Day <rpjday@crashcourse.ca>2012-11-13 07:57:54 +0000
committerTom Rini <trini@ti.com>2012-12-10 08:55:25 -0700
commite3fe62574d6ea1609a503d0a368bd93ef6c04bb8 (patch)
tree165d2244aae8d1154aa5afe5682ab471651a1268 /arch/arm
parent8c4445d26633f43fcd04add3d6cdc3bc41d14841 (diff)
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omap3: Add a few comments to "#endif"s for readability.
No functional changes, just more comments for readability when a preprocessor check spans more than a few lines, and for consistency. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/omap3/board.c4
-rw-r--r--arch/arm/cpu/armv7/omap3/mem.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index f3cd81a..89c587e 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -478,7 +478,7 @@ void omap3_outer_cache_disable(void)
*/
omap3_update_aux_cr(0, 0x2);
}
-#endif
+#endif /* !CONFIG_SYS_L2CACHE_OFF */
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
@@ -486,4 +486,4 @@ void enable_caches(void)
/* Enable D-cache. I-cache is already enabled in start.S */
dcache_enable();
}
-#endif
+#endif /* !CONFIG_SYS_DCACHE_OFF */
diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c
index 1ca37a9..d04a5a1 100644
--- a/arch/arm/cpu/armv7/omap3/mem.c
+++ b/arch/arm/cpu/armv7/omap3/mem.c
@@ -42,7 +42,7 @@ static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG5,
M_NAND_GPMC_CONFIG6, 0
};
-#endif
+#endif /* CONFIG_CMD_NAND */
#if defined(CONFIG_CMD_ONENAND)
static const u32 gpmc_onenand[GPMC_MAX_REG] = {
@@ -53,7 +53,7 @@ static const u32 gpmc_onenand[GPMC_MAX_REG] = {
ONENAND_GPMC_CONFIG5,
ONENAND_GPMC_CONFIG6, 0
};
-#endif
+#endif /* CONFIG_CMD_ONENAND */
/********************************************************
* mem_ok() - test used to see if timings are correct