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authorYe.Li <B37916@freescale.com>2014-06-12 19:33:05 +0800
committerYe Li <ye.li@nxp.com>2016-03-25 13:38:29 +0800
commitdc767fb7d5c155f2a6ef01c4dee808b9c1944fc2 (patch)
tree51f57ed4442985ee9a551b43b550541adbaa007a /arch/arm
parentaaa55881de3e9aa8232c819a2c8a3abb285b682f (diff)
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ENGR00315894-76 mx6 clock: Add vadc clock enable function
Add vadc clock enable function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 721c7a1448c5b7265b597b83d18f8338a27ea213) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 903a59ef941f39b6d7f693dd7c60528e166de079)
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c12
-rw-r--r--arch/arm/include/asm/arch-mx6/clock.h1
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 31d6117..3f3600c 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -890,6 +890,18 @@ void enable_qspi_clk(int qspi_num)
}
#endif
+#if defined(CONFIG_VIDEO_GIS)
+void mxs_set_vadcclk()
+{
+ u32 reg = 0;
+
+ reg = readl(&imx_ccm->cscmr2);
+ reg &= ~MXC_CCM_CSCMR2_VID_CLK_SEL_MASK;
+ reg |= 0x19 << MXC_CCM_CSCMR2_VID_CLK_SEL_OFFSET;
+ writel(reg, &imx_ccm->cscmr2);
+}
+#endif
+
#ifdef CONFIG_FEC_MXC
int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
{
diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h
index 4a9e0eb..9101b83 100644
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -73,4 +73,5 @@ int enable_lvds_bridge(u32 lcd_base_addr);
void enable_qspi_clk(int qspi_num);
void enable_thermal_clk(void);
void mxs_set_lcdclk(u32 base_addr, u32 freq);
+void mxs_set_vadcclk(void);
#endif /* __ASM_ARCH_CLOCK_H */