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authorZach Sadecki <zach@itwatchdogs.com>2012-01-09 10:22:54 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-01-16 08:40:10 +0100
commit8db9eff6c51ad874d6dadfee70c23302c08bd9c4 (patch)
tree0ab4434d6eaff7f4f06687c3048406525680fbef /arch/arm
parentc660a541828138ac4ba1ef82638df3b78e3bc65c (diff)
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mx28: fix clearing of IRQs in power init
There are 2 locations in the power init code for the mx28 where IRQs are not being cleared because incorrect methods to clear those bits were being used. This was causing my board to get stuck waiting for POWER_CTRL_VDD5V_DROOP_IRQ to clear. Using the correct method to clear the IRQs fixes it. Signed-off-by: Zach Sadecki <zach@itwatchdogs.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Marek Vasut <marek.vasut@gmail.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/cpu/arm926ejs/mx28/spl_power_init.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index a4dc2a3..380b120 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -240,8 +240,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
clrbits_le32(&power_regs->hw_power_minpwr, POWER_MINPWR_PWD_BO);
while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ)
- clrbits_le32(&power_regs->hw_power_ctrl,
- POWER_CTRL_VBUS_VALID_IRQ);
+ writel(POWER_CTRL_VBUS_VALID_IRQ,
+ &power_regs->hw_power_ctrl_clr);
if (prev_5v_brnout) {
writel(POWER_5VCTRL_PWDN_5VBRNOUT,
@@ -256,8 +256,8 @@ void mx28_enable_4p2_dcdc_input(int xfer)
}
while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VDD5V_DROOP_IRQ)
- clrbits_le32(&power_regs->hw_power_ctrl,
- POWER_CTRL_VDD5V_DROOP_IRQ);
+ writel(POWER_CTRL_VDD5V_DROOP_IRQ,
+ &power_regs->hw_power_ctrl_clr);
if (prev_5v_droop)
clrbits_le32(&power_regs->hw_power_ctrl,